AT83C51RB2-3CSCM View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT83C51RB2-3CSCM

80C51 High Performance ROM 8-bit Microcontroller

Atmel Corporation 

Table 30. PCON Register

PCON - Power Control Register (87h)

7

6

5

SMOD1 SMOD0

-

4

3

2

1

0

POF

GF1

GF0

PD

IDL

Bit

Number

7

6

5

4

3

2

1

0

Bit

Mnemonic Description

SMOD1

Serial Port Mode bit 1 for UART

Set to select double baud rate in mode 1, 2 or 3.

SMOD0

Serial Port Mode bit 0 for UART

Cleared to select SM0 bit in SCON register.

Set to select FE bit in SCON register.

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

POF

Power-off Flag

Cleared to recognize next reset type.

Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set

by software.

General purpose Flag

GF1 Cleared by user for general purpose usage.

Set by user for general purpose usage.

General purpose Flag

GF0 Cleared by user for general purpose usage.

Set by user for general purpose usage.

Power-down mode bit

PD

Cleared by hardware when reset occurs.

Set to enter power-down mode.

Idle mode bit

IDL Cleared by hardware when interrupt or reset occurs.

Set to enter idle mode.

Reset Value = 00X1 0000b

Not bit addressable

Power-off flag reset value will be 1 only after a power on (cold reset). A warm reset

doesn’t affect the value of this bit.

44 AT80C51RD2/AT83C51Rx2

4113B–8051–03/05

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