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AT80C51RB2-3CSCM View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
AT80C51RB2-3CSCM
Atmel
Atmel Corporation 
AT80C51RB2-3CSCM Datasheet PDF : 83 Pages
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ROM
ROM Structure
Hardware Config Byte
ROM Lock System
Program ROM Lock Bits
AT80C51RD2/AT83C51Rx2
The T89C51RB2/RC2 ROM memory is divided in two different arrays:
• The code array:16/32K bytes.
• The config byte: 1 byte.
The config byte sets the starting microcontroller options and the security levels.
The starting options are X2 mode, and XRAM.
7
6
5
4
3
2
1
0
X2
-
-
-
XRAM
-
LB1
LB0
Bit
Number
7
6
5
4
3
2
1-0
Bit
Mnemonic
X2
-
-
-
XRAM
-
LB0-1
Description
X2 Mode
Cleared to force X2 mode (6 clocks per instruction)
Set to force X1 mode, Standard Mode.
Reserved
Reserved
Reserved
XRAM config bit
Set this bit to enable XRAM.
Clear this bit to disable XRAM.
Reserved
User Program ROM Lock Bits
see Table 46.
The program Lock system, when programmed, protects the on-chip program against
software piracy.
Table 46. Program Lock bits
Program Lock Bits Protection Description
Security
level
LB0 LB1
1
U
U No program lock features enabled.
2
P
U Reserved. Do not use.
MOVC instruction executed from external program memory are disabled from
3
U
P fetching code bytes from internal memory, EA is sampled and latched on reset.
Verify disable.
Notes:
1. U: unprogrammed
P: programmed
2. The lock bits when programmed according to Table 46 will provide different level of
protection for the on-chip code and data.
63
4113B–8051–03/05

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