Table 7-1. AUXR1: Auxiliary Register 1
7
6
5
4
3
2
1
-
-
-
-
GF3
0
-
Bit
Bit
Number Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
GF3 This bit is a general purpose user flag
2
0
Reserved
Always stuck at 0.
1
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
0
DPS Clear to select DPTR0.
Set to select DPTR1.
Reset Value = XXXX 00X0
Not bit addressable
0
DPS
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new feature. In that case, the reset value of the new bit will be 0, and its
active value will be 1. The value read from a reserved bit is indeterminate.
12 AT/TS8xC54/8X2
4431E–8051–04/06