AT88RF04C-MY1G View Datasheet(PDF) - Atmel Corporation
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AT88RF04C-MY1G Datasheet PDF : 158 Pages
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I.3. The Password and PAC Registers
Each password set, along with its associated Password Attempt Counters is stored in an 8 byte segment in the
Password section of the Configuration Memory. Figure 30 illustrates password set “z” in the Configuration Memory
map. The Write Password and Write Password PAC are stored in the lower four bytes, while the Read Password and
Read Password PAC are stored in the upper four bytes.
Figure 30. Password Set Register Format
$0
$1
$2
$3
ADDR
PAC
PW Write z
$4
PAC
$5
$6
$7
PW Read z
PAC
PW1
PW2
PW3
PAC
PW1
PW2
PW3
Each password register contains the three byte password that is compared with the three byte password that is sent for
verification with the Check Password command. The storage locations of the three password bytes is illustrated in the
bottom half of Figure 30.
Table 76. Password Attempt Counter Coding for the Default DCR Configuration of 88SC PICCs.
PAC Register
Description
$FF
No Failed Attempts
$EE
1 Failed Attempt
$CC
2 Failed Attempts
$88
3 Failed Attempts
$00
4 Failed Attempts (LOCK)
All Other Values Are Not Supported
Table 77. Password Attempt Counter Coding for the Extended Trials Allowed DCR Configuration of 88SC PICCs.
PAC Register
Description
$FF
No Failed Attempts
$FE
1 Failed Attempt
$FC
2 Failed Attempts
$F8
3 Failed Attempts
$F0
4 Failed Attempts
$E0
5 Failed Attempts
$C0
6 Failed Attempts
$80
7 Failed Attempts
$00
8 Failed Attempts (LOCK)
All Other Values Are Not Supported
102 AT88SC0808/1616/3216/6416CRF, AT88RF04C
5276C–RFID–3/09
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