ATMEGA64L-8MI View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATMEGA64L-8MI
Atmel Corporation
ATMEGA64L-8MI Datasheet PDF : 363 Pages
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EEPROM Address Register –
EEARH and EEARL
Bit
Read/Write
Initial Value
15
–
EEAR7
7
R
R/W
0
X
14
–
EEAR6
6
R
R/W
0
X
13
–
EEAR5
5
R
R/W
0
X
12
–
EEAR4
4
R
R/W
0
X
11
–
EEAR3
3
R
R/W
0
X
10
EEAR10
EEAR2
2
R/W
R/W
X
X
9
EEAR9
EEAR1
1
R/W
R/W
X
X
8
EEAR8
EEAR0
0
R/W
R/W
X
X
EEARH
EEARL
• Bits 15..11 – Res: Reserved Bits
These are reserved bits and will always read as zero. When writing to this address loca-
tion, write these bits to zero for compatibility with future devices.
• Bits 10..0 – EEAR10..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address
in the 2K bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 2,048. The Initial Value of EEAR is undefined. A proper value must be
written before the EEPROM may be accessed.
EEPROM Data Register –
EEDR
Bit
Read/Write
Initial Value
7
6
MSB
R/W
R/W
0
0
5
R/W
0
4
R/W
0
3
R/W
0
2
R/W
0
1
R/W
0
0
LSB
R/W
0
EEDR
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to
the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-
ation, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
EEPROM Control Register –
EECR
Bit
7
6
5
4
3
2
1
0
–
–
–
–
EERIE EEMWE EEWE EERE
EECR
Read/Write
R
R
R
R
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
X
0
• Bits 7..4 – Res: Reserved Bits
These bits are reserved bits in the ATmega64 and will always read as zero.
• Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set.
Writing EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a
constant interrupt when EEWE is cleared.
20 ATmega64(L)
2490G–AVR–03/04
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