ATMEGA88V-10MJ View Datasheet(PDF) - Atmel Corporation
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Description
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ATMEGA88V-10MJ Datasheet PDF : 349 Pages
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Table 28. Reset and Interrupt Vectors Placement in ATmega88(1)
BOOTRST
1
IVSEL
0
Reset Address
0x000
Interrupt Vectors Start Address
0x001
1
1
0x000
Boot Reset Address + 0x001
0
0
Boot Reset Address
0x001
0
1
Boot Reset Address
Boot Reset Address + 0x001
Note: 1. The Boot Reset Address is shown in Table 109 on page 268. For the BOOTRST
Fuse “1” means unprogrammed while “0” means programmed.
The most typical and general program setup for the Reset and Interrupt Vector
Addresses in ATmega88 is:
Address Labels Code
Comments
0x000
rjmp RESET
; Reset Handler
0x001
rjmp EXT_INT0
; IRQ0 Handler
0x002
rjmp EXT_INT1
; IRQ1 Handler
0x003
rjmp PCINT0
; PCINT0 Handler
0x004
0x005
0x006
rjmp
rjmp
rjmp
PCINT1
PCINT2
WDT
; PCINT1 Handler
; PCINT2 Handler
; Watchdog Timer Handler
0x007
rjmp TIM2_COMPA
; Timer2 Compare A Handler
0X008
rjmp TIM2_COMPB
; Timer2 Compare B Handler
0x009
rjmp TIM2_OVF
; Timer2 Overflow Handler
0x00A
rjmp TIM1_CAPT
; Timer1 Capture Handler
0x00B
rjmp TIM1_COMPA
; Timer1 Compare A Handler
0x00C
rjmp TIM1_COMPB
; Timer1 Compare B Handler
0x00D
0x00E
0x00F
rjmp
rjmp
rjmp
TIM1_OVF
TIM0_COMPA
TIM0_COMPB
; Timer1 Overflow Handler
; Timer0 Compare A Handler
; Timer0 Compare B Handler
0x010
rjmp TIM0_OVF
; Timer0 Overflow Handler
0x011
rjmp SPI_STC
; SPI Transfer Complete Handler
0x012
rjmp USART_RXC
; USART, RX Complete Handler
0x013
rjmp USART_UDRE
; USART, UDR Empty Handler
0x014
rjmp USART_TXC
; USART, TX Complete Handler
0x015
Handler
rjmp ADC
; ADC Conversion Complete
0x016
rjmp EE_RDY
; EEPROM Ready Handler
0x017
rjmp ANA_COMP
; Analog Comparator Handler
0x018
Handler
0x019
Handler
rjmp TWI
rjmp SPM_RDY
; 2-wire Serial Interface
; Store Program Memory Ready
;
0x01ARESET: ldi r16, high(RAMEND); Main program start
0x01B
RAM
out SPH,r16
; Set Stack Pointer to top of
0x01C
ldi r16, low(RAMEND)
54 ATmega48/88/168
2545D–AVR–07/04
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