XMEGA D4
Figure 25-1. ADC overview.
ADC0
•
•
•
VINP
ADC11
Internal
signals
ADC0
•
•
•
ADC7
VINN
Internal 1.00V
Internal VCC/1.6V
Internal VCC/2
AREFA
AREFB
ADC
Reference
Voltage
Compare
Register
CH0 Result
<
> Threshold
(Int Req)
The ADC may be configured for 8- or 12-bit result, reducing the minimum conversion time (prop-
agation delay) from 5.0µs for 12-bit to 3.6µs for 8-bit result.
ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This
eases calculation when the result is represented as a signed integer (signed 16-bit number).
PORTA has one ADC. Notation of this peripheral is ADCA.
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