ATXMEGA64A1-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

ATXMEGA64A1-CU

8/16-bit XMEGA A1 Microcontroller

Atmel Corporation 

XMEGA A1

23. Crypto Engine

23.1 Features

23.2 Overview

• Data Encryption Standard (DES) CPU instruction

• Advanced Encryption Standard (AES) Crypto module

• DES Instruction

– Encryption and Decryption

– Single-cycle DES instruction

– Encryption/Decryption in 16 clock cycles per 8-byte block

• AES Crypto Module

– Encryption and Decryption

– Support 128-bit keys

– Support XOR data load mode to the State memory for Cipher Block Chaining

– Encryption/Decryption in 375 clock cycles per 16-byte block

The Advanced Encryption Standard (AES) and Data Encryption Standard (DES) are two com-

monly used encryption standards. These are supported through an AES peripheral module and

a DES CPU instruction. All communication interfaces and the CPU can optionally use AES and

DES encrypted communication and data storage.

DES is supported by a DES instruction in the AVR XMEGA CPU. The 8-byte key and 8-byte

data blocks must be loaded into the Register file, and then DES must be executed 16 times to

encrypt/decrypt the data block.

The AES Crypto Module encrypts and decrypts 128-bit data blocks with the use of a 128-bit key.

The key and data must be loaded into the key and state memory in the module before encryp-

tion/decryption is started. It takes 375 peripheral clock cycles before the encryption/decryption is

done and decrypted/encrypted data can be read out, and an optional interrupt can be generated.

The AES Crypto Module also has DMA support with transfer triggers when encryption/decryp-

tion is done and optional auto-start of encryption/decryption when the state memory is fully

loaded.

40

8067L–AVR–08/10

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