ATXMEGA64A1-CU View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
ATXMEGA64A1-CU Datasheet PDF : 107 Pages
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XMEGA A1
31. Instruction Set Summary
Mnemonics
ADD
ADC
ADIW
SUB
SUBI
SBC
SBCI
SBIW
AND
ANDI
OR
ORI
EOR
COM
NEG
SBR
CBR
INC
DEC
TST
CLR
SER
MUL
MULS
MULSU
FMUL
FMULS
FMULSU
DES
RJMP
IJMP
EIJMP
JMP
RCALL
ICALL
EICALL
Operands
Rd, Rr
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd, K
Rd, Rr
Rd
Rd
Rd,K
Rd,K
Rd
Rd
Rd
Rd
Rd
Rd,Rr
Rd,Rr
Rd,Rr
Rd,Rr
Rd,Rr
Rd,Rr
K
k
k
k
Description
Operation
Arithmetic and Logic Instructions
Add without Carry
Rd ← Rd + Rr
Add with Carry
Rd ← Rd + Rr + C
Add Immediate to Word
Rd ← Rd + 1:Rd + K
Subtract without Carry
Rd ← Rd - Rr
Subtract Immediate
Rd ← Rd - K
Subtract with Carry
Rd ← Rd - Rr - C
Subtract Immediate with Carry
Rd ← Rd - K - C
Subtract Immediate from Word
Rd + 1:Rd ← Rd + 1:Rd - K
Logical AND
Rd ← Rd • Rr
Logical AND with Immediate
Rd ← Rd • K
Logical OR
Rd ← Rd v Rr
Logical OR with Immediate
Rd ← Rd v K
Exclusive OR
Rd ← Rd ⊕ Rr
One’s Complement
Rd ← $FF - Rd
Two’s Complement
Rd ← $00 - Rd
Set Bit(s) in Register
Rd ← Rd v K
Clear Bit(s) in Register
Rd ← Rd • ($FFh - K)
Increment
Rd ← Rd + 1
Decrement
Rd ← Rd - 1
Test for Zero or Minus
Rd ← Rd • Rd
Clear Register
Rd ← Rd ⊕ Rd
Set Register
Rd ← $FF
Multiply Unsigned
R1:R0 ← Rd x Rr (UU)
Multiply Signed
R1:R0 ← Rd x Rr (SS)
Multiply Signed with Unsigned
R1:R0 ← Rd x Rr (SU)
Fractional Multiply Unsigned
R1:R0 ← Rd x Rr<<1 (UU)
Fractional Multiply Signed
R1:R0 ← Rd x Rr<<1 (SS)
Fractional Multiply Signed with Unsigned
R1:R0 ← Rd x Rr<<1 (SU)
Data Encryption
if (H = 0) then R15:R0 ← Encrypt(R15:R0, K)
else if (H = 1) then R15:R0 ← Decrypt(R15:R0, K)
Branch Instructions
Relative Jump
PC ← PC + k + 1
Indirect Jump to (Z)
PC(15:0) ← Z,
PC(21:16) ← 0
Extended Indirect Jump to (Z)
PC(15:0) ← Z,
PC(21:16) ← EIND
Jump
PC ← k
Relative Call Subroutine
PC ← PC + k + 1
Indirect Call to (Z)
PC(15:0) ← Z,
PC(21:16) ← 0
Extended Indirect Call to (Z)
PC(15:0) ← Z,
PC(21:16) ← EIND
Flags
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,C,N,V,S
Z,C,N,V,S,H
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
Z,N,V,S
None
Z,C
Z,C
Z,C
Z,C
Z,C
Z,C
None
None
None
None
None
None
None
#Clocks
1
1
2
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
1/2
2
2
2
3
2 / 3(1)
2 / 3(1)
3(1)
60
8067L–AVR–08/10
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