TC820CPL View Datasheet(PDF) - Microchip Technology
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TC820CPL Datasheet PDF : 28 Pages
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5.11 External Peak Detection
The TC820 will hold the highest A/D conversion or fre-
quency reading indefinitely when the PKHOLD input is
connected to VDD. However, the analog peak input
must be present during the A/D converter's signal inte-
grate period. For slowly changing signals, such as tem-
perature, the peak reading will be properly converted
and held.
If rapidly changing analog signals must be held, an
external peak detector should be added. An inexpensive
circuit can be made from an op amp and a few discrete
components, as shown in Figure 5-12. The droop rate of
the external peak detector should be adjusted so that the
held voltage will not decay below the desired accuracy
level during the converter's 400msec conversion time.
FIGURE 5-12:
10kΩ
EXTERNAL PEAK
DETECTOR
+9V
VDD
PKHOLD
TL061
VIN
1N4148
0.01µF
Offset Null
TC820
VIN+
VSS
0V
5.12 Liquid Crystal Display (LCD)
The TC820 drives a triplex (multiplexed 3:1) LCD with
three backplanes. The LCD can include decimal points,
polarity sign, and annunciators for over range, peak
hold, high and low logic levels, and low battery.
Table 5-2 shows the assignment of the display seg-
ments to the backplanes and segment drive lines. The
backplane drive frequency is obtained by dividing the
oscillator frequency by 240.
Backplane waveforms are shown in Figure 5-13. These
appear on outputs BP1, BP2, and BP3. They remain the
same, regardless of the segments being driven.
FIGURE 5-13:
BP1
BACKPLANE
WAVEFORMS
BP2
BP3
© 2002 Microchip Technology Inc.
TC820
Other display output lines have waveforms that vary
depending on the displays values. Figure 5-13 shows a
set of waveforms for the a, g, d outputs of one digit for
several combinations of "on" segments.
FIGURE 5-14:
Segment
Line
All OFF
a Segment
ON
d, g OFF
a, g ON
d OFF
All ON
TYPICAL DISPLAY
OUTPUT WAVEFORMS
VDD
VH
VL
VDISP
VDD
VH
VL
VDISP
VDD
VH
VL
VDISP
VDD
VH
VL
VDISP
TABLE 5-2: LCD BACKPLANE AND
SEGMENT ASSIGNMENTS
40-Pin 44-Pin LCD Display
(PDIP) (PQFP) Pin Number
BP1
BP2
1
40
2
41
3
42
4
43
5
44
6
1
7
2
8
3
9
4
10
5
11
6
12
7
13
8
14
9
15
10
3
4
5
6
7
8
9
10
11
12
13
14
2,16*
1
15
LOW
A4 "—"
B4
G4
HIGH C4
A3
F3
B3
G3
OVER C3
A2
F2
B2
G2
PEAK C2
A1
F1
B1
G1
—
C1
BP1 —
LOW BP2
BP3
E4
D4
DP3
E3
D3
DP2
E2
D2
DP1
E1
D1
BATT
BP3
*Connect both pins 2 and 16 of LCD to TC820 BP3 of output.
DS21476B-page 21
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