C8051F002 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F002

Mixed-Signal 32KB ISP FLASH MCU Family

Silicon Laboratories 

C8051F000/1/2/5/6/7

C8051F010/1/2/5/6/7

21.1.1. EXTEST Instruction

The EXTEST instruction is accessed via the IR. The Boundary DR provides control and observability of all the

device pins as well as the SFR bus and Weak Pullup feature. All inputs to on-chip logic are set to one.

21.1.2. SAMPLE Instruction

The SAMPLE instruction is accessed via the IR. The Boundary DR provides observability and presetting of the

scan-path latches.

21.1.3. BYPASS Instruction

The BYPASS instruction is accessed via the IR. It provides access to the standard 1-bit JTAG Bypass data register.

21.1.4. IDCODE Instruction

The IDCODE instruction is accessed via the IR. It provides access to the 32-bit Device ID register.

Figure 21.2. DEVICEID: JTAG Device ID Register

Version

Bit31

Bit28 Bit27

Part Number

Bit12 Bit11

Manufacturer ID

Reset Value

1

(Varies)

Bit1 Bit0

Version = 0000b (Revision A) or

= 0001b (Revision B)

Part Number = 0000 0000 0000 0000b or

= 0000 0000 0000 0010b

Manufacturer ID = 0010 0100 001b (Silicon Laboratories)

Rev. 1.7

166

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