C8051F045 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

Timer1_OverflowRate = T1CLK  256 – TH1

Equation 21.2. Timer 1 Overflow Rate

When Timers 2, 3, or 4 are selected as a baud rate source, the baud rate is generated as shown in

Equation 21.3.

Mode1_BaudRate = 1  16  Timer234_OverflowRate

Equation 21.3. Mode 1 Baud Rate using Timer 2, 3, or 4

The overflow rate for Timer 2, 3, or 4 is determined by the clock source for the timer (TnCLK) and the 16-

bit reload value stored in the RCAPn register (n = 2, 3, or 4), as shown in Equation 21.4.

Timer234_OverflowRate = TnCLK  65536 – RCAPn

Equation 21.4. Timer 2, 3, or 4 Overflow Rate

268

Rev. 1.5

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