C8051F040 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F040

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

JTAG Register Definition 25.4. FLASHDAT: JTAG Flash Data

Reset Value

0000000000

Bit9

Bit0

This register is used to read or write data to the Flash memory across the JTAG interface.

Bits9-2:

Bit1:

Bit0:

DATA7-0: Flash Data Byte.

FAIL: Flash Fail Bit.

0: Previous Flash memory operation was successful.

1: Previous Flash memory operation failed. Usually indicates the associated memory loca-

tion was locked.

BUSY: Flash Busy Bit.

0: Flash interface logic is not busy.

1: Flash interface logic is processing a request. Reads or writes while BUSY = 1 will not 

initiate another operation.

JTAG Register Definition 25.5. FLASHADR: JTAG Flash Address

Bit15

Reset Value

0x0000

Bit0

This register holds the address for all JTAG Flash read, write, and erase operations. This register auto-

increments after each read or write, regardless of whether the operation succeeded or failed.

Bits15-0: Flash Operation 16-bit Address.

Rev. 1.5

323

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