C8051F045 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F045

Mixed Signal ISP Flash MCU Family

Silicon Laboratories 

C8051F040/1/2/3/4/5/6/7

Input Voltage

(AD0 - AGND)

REF x (4095/4096)

ADC Data

Word

0xFFF0

AD0WINT

not affected

REF x (512/4096)

REF x (256/4096)

0x2010

0x2000

0x1FF0

0x1010

0x1000

0x0FF0

ADC0LTH:ADC0LTL

AD0WINT=1

ADC0GTH:ADC0GTL

AD0WINT

not affected

0

0x0000

Given:

AMX0SL = 0x00, AMX0CF = 0x00,

AD0LJST = ‘1’,

ADC0LTH:ADC0LTL = 0x2000,

ADC0GTH:ADC0GTL = 0x1000.

An ADC0 End of Conversion will cause an

ADC0 Window Compare Interrupt (AD0WINT

= ‘1’) if the resulting ADC0 Data Word is

< 0x2000 and > 0x1000.

Input Voltage

(AD0 - AGND)

REF x (4095/4096)

ADC Data

Word

0xFFF0

AD0WINT=1

REF x (512/4096)

REF x (256/4096)

0x2010

0x2000

0x1FF0

0x1010

0x1000

0x0FF0

ADC0GTH:ADC0GTL

AD0WINT

not affected

ADC0LTH:ADC0LTL

AD0WINT=1

0

0x0000

Given:

AMX0SL = 0x00, AMX0CF = 0x00,

AD0LJST = ‘1’

ADC0LTH:ADC0LTL = 0x1000,

ADC0GTH:ADC0GTL = 0x2000.

An ADC0 End of Conversion will cause an

ADC0 Window Compare Interrupt (AD0WINT

= ‘1’) if the resulting ADC0 Data Word is

< 0x1000 or > 0x2000.

Figure 5.10. 12-Bit ADC0 Window Interrupt Example:

Left Justified Single-Ended Data

Rev. 1.5

65

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