C8051F317 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F317

8/16 kB ISP Flash MCU Family

Silicon Laboratories 

C8051F310/1/2/3/4/5/6/7

SFR Definition 13.7. P1: Port1

R/W

P1.7

Bit7

R/W

P1.6

Bit6

R/W

P1.5

Bit5

R/W

P1.4

Bit4

R/W

P1.3

Bit3

R/W

P1.2

Bit2

R/W

R/W

Reset Value

P1.1

P1.0 11111111

Bit1

Bit0 SFR Address:

(bit addressable) 0x90

Bits7–0:

P1.[7:0]

Write - Output appears on I/O pins per Crossbar Registers.

0: Logic Low Output.

1: Logic High Output (high impedance if corresponding P1MDOUT.n bit = 0).

Read - Always reads ‘1’ if selected as analog input in register P1MDIN. Directly reads Port

pin when configured as digital input.

0: P1.n pin is logic low.

1: P1.n pin is logic high.

Note: Only P1.0–P1.5 are associated with Port pins on the C8051F1316/7 devices.

SFR Definition 13.8. P1MDIN: Port1 Input Mode

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

11111111

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0 SFR Address:

0xF2

Bits7–0:

Analog Input Configuration Bits for P1.7-P1.0 (respectively).

Port pins configured as analog inputs have their weak pullup, digital driver, and digital

receiver disabled.

0: Corresponding P1.n pin is configured as an analog input.

1: Corresponding P1.n pin is not configured as an analog input.

Note: Only P1.0–P1.5 are associated with Port pins on the C8051F1316/7 devices.

134

Rev. 1.6

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