C8051F342 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
C8051F342 Datasheet PDF : 276 Pages
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C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
SFR Definition 16.3. USB0DAT: USB0 Data
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
USB0DAT
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
0x97
This SFR is used to indirectly read and write USB0 registers.
Write Procedure:
1. Poll for BUSY (USB 0ADR.7) => ‘0’.
2. Load the target USB0 register address into the USBADDR bits in register USB0ADR.
3. Write data to USB0DAT.
4. Repeat (Step 2 may be skipped when writing to the same USB0 register).
Read Procedure:
1. Poll for BUSY (USB 0ADR.7) => ‘0’.
2. Load the target USB0 register address into the USBADDR bits in register USB0ADR.
3. Write ‘1’ to the BUSY bit in register USB0ADR (steps 2 and 3 can be performed in the
same write).
4. Poll for BUSY (USB 0ADR.7) => ‘0’.
5. Read data from USB0DAT.
6. Repeat from Step 2 (Step 2 may be skipped when reading the same USB0 register; Step 3
may be skipped when the AUTORD bit (USB0ADR.6) is logic 1).
164
Rev. 1.3
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