C8051F342 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
C8051F342 Datasheet PDF : 276 Pages
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C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Values Read
Table 17.4. SMBus Status Decoding
Current SMbus State
Typical Response Options
Values
Written
1110
0
0
X
A master START was generated.
Load slave address + R/W
into SMB0DAT.
00X
0
0
0
A master data or address byte Set STA to restart transfer.
was transmitted; NACK received. Abort transfer.
10X
01X
Load next data byte into
SMB0DAT.
00X
End transfer with STOP.
01X
1100
0
0
1
A master data or address byte
was transmitted; ACK received.
End transfer with STOP and
start another transfer.
1
1
X
Send repeated START.
10X
Switch to Master Receiver
Mode (clear SI without writ- 0 0 X
ing new data to SMB0DAT).
Acknowledge received byte;
Read SMB0DAT.
0
0
1
Send NACK to indicate last
byte, and send STOP.
010
Send NACK to indicate last
byte, and send STOP fol-
lowed by START.
110
Send ACK followed by
repeated START.
1000
1
0
X
A master data byte was received;
ACK requested.
Send NACK to indicate last
byte, and send repeated
START.
101
100
Send ACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
001
Send NACK and switch to
Master Transmitter Mode
(write to SMB0DAT before
clearing SI).
000
Rev. 1.3
203
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