C8051F38B-GMR View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

SFR Definition 17.2. RSTSRC: Reset Source

Bit

7

6

5

4

3

2

1

0

Name USBRSF FERROR C0RSEF SWRSF WDTRSF MCDRSF PORSF PINRSF

Type R/W

R

R/W

R/W

R

R/W

R/W

R

Reset Varies

Varies

Varies

Varies

Varies

Varies

Varies

Varies

SFR Address = 0xEF; SFR Page = All Pages

Bit Name

Description

Write

Read

7 USBRSF USB Reset Flag

Writing a 1 enables USB Set to 1 if USB caused the

as a reset source.

last reset.

6 FERROR Flash Error Reset Flag.

N/A

Set to 1 if Flash

read/write/erase error

caused the last reset.

5 C0RSEF Comparator0 Reset Enable Writing a 1 enables Com- Set to 1 if Comparator0

and Flag.

parator0 as a reset source caused the last reset.

(active-low).

4 SWRSF Software Reset Force and Writing a 1 forces a sys- Set to 1 if last reset was

Flag.

tem reset.

caused by a write to

SWRSF.

3 WDTRSF Watchdog Timer Reset Flag. N/A

Set to 1 if Watchdog Timer

overflow caused the last

reset.

2 MCDRSF Missing Clock Detector

Enable and Flag.

Writing a 1 enables the Set to 1 if Missing Clock

Missing Clock Detector. Detector timeout caused

The MCD triggers a reset the last reset.

if a missing clock condition

is detected.

1 PORSF Power-On / VDD Monitor

Writing a 1 enables the

Reset Flag, and VDD monitor

Reset Enable.

VDD monitor as a reset

source.

Writing 1 to this bit

Set to 1 anytime a power-

on or VDD monitor reset

occurs.

When set to 1 all other

before the VDD monitor RSTSRC flags are inde-

is enabled and stabilized terminate.

may cause a system

reset.

0 PINRSF HW Pin Reset Flag.

N/A

Set to 1 if RST pin caused

the last reset.

Note: Do not use read-modify-write operations on this register

134

Rev. 1.4

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