C8051F38B-GMR View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
C8051F38B-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
USB Register Definition 21.5. CLKREC: Clock Recovery Control
Bit
7
6
5
4
3
2
1
0
Name CRE CRSSEN CRLOW
Type R/W
R/W
R/W
R/W
Reset
0
0
0
0
1
1
1
1
USB Register Address = 0x0F
Bit Name
Function
7
CRE Clock Recovery Enable Bit.
This bit enables/disables the USB clock recovery feature.
0: Clock recovery disabled.
1: Clock recovery enabled.
6 CRSSEN Clock Recovery Single Step.
This bit forces the oscillator calibration into single-step mode during clock
recovery.
0: Normal calibration mode.
1: Single step mode.
5 CRLOW Low Speed Clock Recovery Mode.
This bit must be set to 1 if clock recovery is used when operating as a Low Speed USB
device.
0: Full Speed Mode.
1: Low Speed Mode.
4:0 Reserved Must Write = 01111b.
180
Rev. 1.4
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