C8051F38B-GMR View Datasheet(PDF) - Silicon Laboratories
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Description
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C8051F38B-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
27.2. PCA0 Interrupt Sources
Figure 27.3 shows a diagram of the PCA interrupt tree. There are six independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter and the individual flags for each PCA channel (CCF0, CCF1, CCF2,
CCF3, and CCF4), which are set according to the operation mode of that module. These event flags are
always set when the trigger condition occurs. Each of these flags can be individually selected to generate
a PCA0 interrupt, using the corresponding interrupt enable flag (ECF for CF, and ECCFn for each CCFn).
PCA0 interrupts must be globally enabled before any individual interrupt sources are recognized by the
processor. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1.
(for n = 0 to 4)
PCA0CPMn
PECCMT PE
WC A A A O WC
MO P P T GMC
1MPN n n n F
6nnn
n
n
PCA0CN
CC CCCCC
FR CCCCC
FFFFF
43210
PCA0MD
C WW
I DD
DT L
L EC
K
CCCE
PPPC
SSSF
210
PCA Counter/Timer 16-
bit Overflow
PCA Module 0
(CCF0)
PCA Module 1
(CCF1)
PCA Module 2
(CCF2)
PCA Module 3
(CCF2)
PCA Module 4
(CCF2)
ECCF0
ECCF1
ECCF2
ECCF3
ECCF4
0
1
0
1
0
1
0
1
0
1
0
1
EPCA0
Figure 27.3. PCA Interrupt Block Diagram
EA
0
1
0 Interrupt
Priority
1
Decoder
300
Rev. 1.4
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