C8051F38B-GMR View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
Manufacturer
C8051F38B-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
6. 10-Bit ADC (ADC0, C8051F380/1/2/3/C only)
ADC0 on the C8051F380/1/2/3/C is a 500 ksps, 10-bit successive-approximation-register (SAR) ADC with
integrated track-and-hold, and a programmable window detector. The ADC is fully configurable under soft-
ware control via Special Function Registers. The ADC may be configured to measure various different sig-
nals using the analog multiplexer described in Section “6.5. ADC0 Analog Multiplexer (C8051F380/1/2/3/C
only)” on page 59. The voltage reference for the ADC is selected as described in Section “7. Voltage Refer-
ence Options” on page 62. The ADC0 subsystem is enabled only when the AD0EN bit in the ADC0 Control
register (ADC0CN) is set to logic 1. The ADC0 subsystem is in low power shutdown when this bit is logic 0.
AMX0P
ADC0CN
Port I/O
Pins*
VDD
Temp
Sensor
Port I/O
Pins*
VREF
GND
Positive
Input
(AIN+)
AMUX
Negative
Input
(AIN-)
AMUX
AIN+
AIN-
VDD
10-Bit
SAR
ADC
000
Start
001
Conversion 010
011
100
101
110
111
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Timer 3 Overflow
Timer 4 Overflow
Timer 5 Overflow
ADC0LTH ADC0LTL
AD0WINT
Window
Compare
32 Logic
* 21 Selections on 32-pin package
32 Selections on 48-pin package
AMX0N
ADC0CF
ADC0GTH ADC0GTL
Figure 6.1. ADC0 Functional Block Diagram
46
Rev. 1.4
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