C8051F38B-GMR View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F38B-GMR

Full Speed USB Flash MCU Family

Silicon Laboratories 

C8051F380/1/2/3/4/5/6/7/C

CPT1CN

VDD

Comparator

Input Mux

CP1 +

+

CP1 - -

CPT1MD

GND

D SET Q

Q CLR

D SET Q

Q CLR

(SYNCHRONIZER)

CP1

Crossbar

CP1A

0

CP1RIF

1

CP1EN

EA

0

0

1

CP1FIF

1

Figure 8.2. Comparator1 Functional Block Diagram

CP1

0 Interrupt

1

The Comparator output can be polled in software, used as an interrupt source, and/or routed to a Port pin.

When routed to a Port pin, the Comparator output is available asynchronous or synchronous to the system

clock; the asynchronous output is available even in STOP mode (with no system clock active). When dis-

abled, the Comparator output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic low state,

and the power supply to the comparator is turned off. See Section “20.1. Priority Crossbar Decoder” on

page 154 for details on configuring Comparator outputs via the digital Crossbar. Comparator inputs can be

externally driven from –0.25 V to (VDD) + 0.25 V without damage or upset. The complete Comparator elec-

trical specifications are given in Section “5. Electrical Characteristics” on page 37.

The Comparator response time may be configured in software via the CPTnMD registers (see SFR Defini-

tion 8.2 and SFR Definition 8.4). Selecting a longer response time reduces the Comparator supply current.

Rev. 1.4

65

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