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CS4334 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
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CS4334 Datasheet PDF : 26 Pages
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CS4334/5/6/7/8/9
5. PIN DESCRIPTIONS
SERIAL DATA INPUT
DE-EMPHASIS / SCLK
LEFT / RIGHT CLOCK
MASTER CLOCK
SDATA 1
DEM/SCLK 2
LRCK 3
MCLK 4
8 AOUTL
7 VA
6 AGND
5 AOUTR
ANALOG LEFT CHANNEL OUTPUT
ANALOG POWER
ANALOG GROUND
ANALOG RIGHT CHANNEL OUTPUT
No. Pin Name I/O
Pin Function and Description
1
SDATA
I Serial Audio Data Input - two’s complement MSB-first serial data is input on this pin.
The data is clocked into the CS4334/5/6/7/8/9 via internal or external SCLK, and the
channel is determined by LRCK.
2 DEM/SCLK I De-Emphasis/External Serial Clock Input - used for de-emphasis filter control or exter-
nal serial clock input.
3
LRCK
I Left/Right Clock - determines which channel is currently being input on the Audio Serial
Data Input pin, SDATA.
4
MCLK
I Master Clock - frequency must be 256x, 384x, or 512x the input sample rate in BRM and
either 128x or 192x the input sample rate in HRM.
5 AOUTR O Analog Right Channel Output - typically 3.5 Vp-p for a full-scale input signal.
6
AGND
I Analog Ground - analog ground reference is 0V.
7
VA
I Analog Power - analog power supply is nominally +5V.
8 AOUTL O Analog Left Channel Output - typically 3.5 Vp-p for a full-scale input signal.
DS248PP3
21

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