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CS4952 View Datasheet(PDF) - Cirrus Logic

Part Name
Description
Manufacturer
CS4952
Cirrus-Logic
Cirrus Logic 
CS4952 Datasheet PDF : 44 Pages
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CS4952/53
Control Register 0
Address 0x00
Bit Number
7
Bit Name
Default
0
CONTROL_0
6
5
TV_FMT
0
0
Read/Write
4
MSTR
0
3
CCIR656
0
Default Value = 01h
2
PROG
0
1
0
IN_MODE CBCR_UV
0
1
Bit
Mnemonic
Function
7:5
TV_FMT selects the TV display format
000:
NTSC-M CCIR601 timing (default)
001:
NTSC-M RS170A timing
010:
PAL-B, D, G, H, I
011:
PAL-M
100:
101:
110-111:
PAL-N (Argentina)
PAL-N (non Argentina)
reserved
4
MSTR
1: Master Mode, 0: Slave Mode
3
CCIR656 video input is in CCIR656 format (0: off, 1: on)
2
PROG
Progressive scanning enable (enable with 1)
1
IN_MODE Input select (0: solid background, 1: use V [7:0] data)
0
CBCR_UV enable YCbCr to YUV conversion (1: enable, 0: disable)
Control Register 1
Address 0x01
CONTROL_1
Read/Write
Bit Number
7
6
5
4
3
Bit Name CBLANK Y_DELAY C_BW C_LPF_EN FLD
Default
0
0
0
0
0
Default Value = 04h
2
PED
1
1
CBAR
0
0
CBCRSEL
0
Bit
Mnemonic
Function
7
CBLANK Composite Blank / HSYNC output select (1: CB, 0: HSYNC)
6
Y_DELAY luma to chroma delay (0: no delay, 1: luma is delayed by one 13.5 MHz cycle)
5
C_BW
chroma lpf bandwidth (0: 650 KHz, 1: 1.3 MHz)
4
C_LPF_EN chroma lpf on/off (0: off, 1: on)
3
FLD
Polarity of Field (0: odd field - 0, 1: odd field - 1)
2
PED
Pedestal offset (0: 0 IRE, 1: 7.5 IRE)
1
CBAR
internal color bar generator (0: off, 1: on)
0
CBCRSEL CbCr select (0: chroma undelayed, 1: chroma delayed by one clock)
DS223PP2
29

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