TABLE 20-7: SYSTEM INTEGRATION REGISTER MAP
SFR
Name
Addr. Bit 15
Bit 14 Bit 13 Bit 12
Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Reset State
RCON
0740 TRAPR IOPUWR BGST LVDEN
LVDL<3:0>
EXTR SWR SWDTEN WDTO SLEEP IDLE
BOR
POR
(Note 1)
OSCCON 0742 —
COSC<2:0>
—
NOSC<2:0>
POST<1:0>
LOCK
—
CF
— LPOSCEN OSWEN
(Note 2)
OSCTUN 0744 —
—
—
—
—
—
—
—
—
—
—
—
TUN3 TUN2 TUN1 TUN0 0000 0000 0000 0000
PMD1
0770 T5MD T4MD T3MD T2MD T1MD —
— DCIMD I2CMD U2MD U1MD
— SPI1MD —
C1MD ADCMD 0000 0000 0000 0000
PMD2
0772 IC8MD IC7MD —
—
—
— IC2MD IC1MD —
—
—
— OC4MD OC3MD OC2MD OC1MD 0000 0000 0000 0000
Note 1: Reset state depends on type of Reset.
2: Reset state depends on Configuration bits.
3: For the dsPIC30F3014 device, the DCIMD, T4MD, T5MD, OC3MD, OC4,MD, IC7MD and IC8MD bits do not perform any function.
4: Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
TABLE 20-8: DEVICE CONFIGURATION REGISTER MAP
File Name Addr. Bits 23-16
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11
Bit 10
Bit 9
FOSC
FWDT
FBORPOR
FGS
1:
F80000
—
FCKSM<1:0>
—
—
—
FOS<2:0>
F80002
—
FWDTEN
—
—
—
—
—
—
F80004
—
MCLREN
—
—
—
—
—
—
F8000A
—
—
—
—
—
—
—
—
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Bit 8
—
—
—
Bit 7
—
—
BOREN
—
Bit 6
—
—
—
—
Bit 5 Bit 4
—
FWPSA<1:0>
BORV<1:0>
—
—
Bit 3 Bit 2 Bit 1 Bit 0
FPR<4:0>
FWPSB<3:0>
—
—
FPWRT<1:0>
—
— GCP GWRP