APPENDIX A: REVISION HISTORY
Revision D (June 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were distrib-
uted with incomplete characterization data.
This revision reflects these changes:
• Revised I2C Slave Addresses
(see Table 14-1)
• Updated example for ADC Conversion Clock
selection (see Section 19.0 “12-bit Analog-to-
Digital Converter (ADC) Module”)
• Base instruction CP1 eliminated from instruction
set (seeTable 21-2 )
• Revised electrical characteristics:
- Operating Current (IDD) Specifications
(see Table 23-5)
- Idle Current (IIDLE) Specifications
(see Table 23-6)
- Power-down Current (IPD) Specifications
(see Table 23-7)
- I/O pin Input Specifications
(see Table 23-8)
- Brown Out Reset (BOR) Specifications
(see Table 23-11)
- Watchdog Timer time-out limits
(see Table 23-20)
-
Revision E (January 2007)
This revision includes updates to the packaging
diagrams.
dsPIC30F3014/4013
© 2007 Microchip Technology Inc.
DS70138E-page 207