DSPIC30F4013AT-20E/ML-ES View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC30F4013AT-20E/ML-ES Datasheet PDF : 220 Pages
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I
I/O Pin Specifications
Input .......................................................................... 171
Output ....................................................................... 171
I/O Ports .............................................................................. 51
Parallel (PIO) .............................................................. 51
I2C 10-bit Slave Mode Operation ........................................ 87
Reception.................................................................... 88
Transmission............................................................... 87
I2C 7-bit Slave Mode Operation .......................................... 87
Reception.................................................................... 87
Transmission............................................................... 87
I2C Master Mode Operation ................................................ 89
Baud Rate Generator.................................................. 90
Clock Arbitration.......................................................... 90
Multi-Master Communication, Bus Collision and
Bus Arbitration .................................................... 90
Reception.................................................................... 90
Transmission............................................................... 89
I2C Master Mode Support ................................................... 89
I2C Module .......................................................................... 85
Addresses ................................................................... 87
Bus Data Timing Characteristics
Master Mode ..................................................... 194
Slave Mode ....................................................... 196
Bus Data Timing Requirements
Master Mode ..................................................... 194
Slave Mode ....................................................... 197
Bus Start/Stop Bits Timing Characteristics
Master Mode ..................................................... 194
Slave Mode ....................................................... 196
General Call Address Support .................................... 89
Interrupts..................................................................... 89
IPMI Support ............................................................... 89
Operating Function Description .................................. 85
Operation During CPU Sleep and Idle Modes ............ 90
Pin Configuration ........................................................ 85
Programmer’s Model................................................... 85
Register Map............................................................... 91
Registers..................................................................... 85
Slope Control .............................................................. 89
Software Controlled Clock Stretching (STREN = 1).... 88
Various Modes ............................................................ 85
I2S Mode Operation .......................................................... 123
Data Justification....................................................... 123
Frame and Data Word Length Selection................... 123
Idle Current (IIDLE) ............................................................ 168
In-Circuit Serial Programming (ICSP) ......................... 41, 135
Input Capture (CAPX) Timing Characteristics .................. 183
Input Capture Module ......................................................... 77
Interrupts..................................................................... 78
Register Map............................................................... 79
Input Capture Operation During Sleep and Idle Modes ...... 78
CPU Idle Mode............................................................ 78
CPU Sleep Mode ........................................................ 78
Input Capture Timing Requirements ................................. 183
Input Change Notification Module ....................................... 54
dsPIC30F3014 Register Map (Bits 15-8) .................... 54
dsPIC30F3014 Register Map (Bits 7-0) ...................... 54
dsPIC30F4013 Register Map (Bits 15-8) .................... 54
dsPIC30F4013 Register Map (Bits 7-0) ...................... 54
Instruction Addressing Modes............................................. 35
File Register Instructions ............................................ 35
Fundamental Modes Supported.................................. 35
MAC Instructions......................................................... 36
© 2007 Microchip Technology Inc.
dsPIC30F3014/4013
MCU Instructions ........................................................ 35
Move and Accumulator Instructions ........................... 36
Other Instructions ....................................................... 36
Instruction Set
Overview................................................................... 156
Summary .................................................................. 153
Internal Clock Timing Examples ....................................... 176
Internet Address ............................................................... 215
Interrupt Controller
Register Map .............................................................. 62
Interrupt Priority .................................................................. 56
Traps .......................................................................... 58
Interrupt Sequence ............................................................. 59
Interrupt Stack Frame................................................. 59
Interrupts ............................................................................ 55
L
Load Conditions................................................................ 174
Low-Voltage Detect (LVD) ................................................ 149
Low-Voltage Detect Characteristics.................................. 171
LVDL Characteristics ........................................................ 172
M
Memory Organization ......................................................... 23
Core Register Map ..................................................... 32
Microchip Internet Web Site.............................................. 215
Modes of Operation
Disable...................................................................... 107
Initialization............................................................... 107
Listen All Messages.................................................. 107
Listen Only................................................................ 107
Loopback .................................................................. 107
Normal Operation ..................................................... 107
Modulo Addressing ............................................................. 36
Applicability................................................................. 38
Incrementing Buffer Operation Example .................... 37
Start and End Address ............................................... 37
W Address Register Selection.................................... 37
MPLAB ASM30 Assembler, Linker, Librarian ................... 162
MPLAB ICD 2 In-Circuit Debugger ................................... 163
MPLAB ICE 2000 High-Performance Universal
In-Circuit Emulator.................................................... 163
MPLAB ICE 4000 High-Performance Universal
In-Circuit Emulator.................................................... 163
MPLAB Integrated Development Environment Software.. 161
MPLAB PM3 Device Programmer .................................... 163
MPLINK Object Linker/MPLIB Object Librarian ................ 162
N
NVM
Register Map .............................................................. 45
O
OC/PWM Module Timing Characteristics ......................... 184
Operating Current (IDD) .................................................... 167
Operating Frequency vs Voltage
dsPIC30FXXXX-20 (Extended) ................................ 165
Oscillator
Configurations .......................................................... 138
Fail-Safe Clock Monitor .................................... 140
Fast RC (FRC).................................................. 139
Initial Clock Source Selection ........................... 138
Low-Power RC (LPRC) .................................... 139
LP Oscillator Control......................................... 139
Phase Locked Loop (PLL) ................................ 139
Start-up Timer (OST)........................................ 138
DS70138E-page 211
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