DSPIC30F9013BT-30E/P View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC30F9013BT-30E/P

High-Performance, 16-Bit Digital Signal Controllers

Microchip Technology 

dsPIC30F3014/4013

Control Registers ...................................................... 141

Operating Modes (Table) .......................................... 136

System Overview ...................................................... 135

Oscillator Selection ........................................................... 135

Oscillator Start-up Timer

Timing Characteristics .............................................. 179

Timing Requirements ................................................ 180

Output Compare Interrupts ................................................. 83

Output Compare Module..................................................... 81

Register Map dsPIC30F3014...................................... 84

Register Map dsPIC30F4013...................................... 84

Timing Characteristics .............................................. 183

Timing Requirements ................................................ 183

Output Compare Operation During CPU Idle Mode............ 83

Output Compare Sleep Mode Operation............................. 83

P

Packaging Information ...................................................... 203

Marking ..................................................................... 203

Peripheral Module Disable (PMD) Registers .................... 151

PICSTART Plus Development Programmer ..................... 164

Pinout Descriptions ............................................................. 11

POR. See Power-on Reset.

Port Register Map for dsPIC30F3014/4013 ........................ 53

Port Write/Read Example.................................................... 52

Power Saving Modes

Sleep and Idle ........................................................... 135

Power-Down Current (IPD) ................................................ 169

Power-Saving Modes ........................................................ 149

Idle ............................................................................ 150

Sleep ......................................................................... 149

Power-up Timer

Timing Characteristics .............................................. 179

Timing Requirements ................................................ 180

Program Address Space ..................................................... 23

Construction ................................................................ 24

Data Access from Program Memory Using

Program Space Visibility ..................................... 26

Data Access From Program Memory Using

Table Instructions................................................ 25

Data Access from, Address Generation...................... 24

Data Space Window into Operation ............................ 27

Data Table Access (lsw) ............................................. 25

Data Table Access (MS Byte) ..................................... 26

Memory Map ............................................................... 23

Table Instructions

TBLRDH.............................................................. 25

TBLRDL .............................................................. 25

TBLWTH ............................................................. 25

TBLWTL.............................................................. 25

Program and EEPROM Characteristics ............................ 173

Program Counter................................................................. 14

Programmable................................................................... 135

Programmer’s Model........................................................... 14

Diagram ...................................................................... 15

Programming Operations .................................................... 43

Algorithm for Program Flash ....................................... 43

Erasing a Row of Program Memory ............................ 43

Initiating the Programming Sequence ......................... 44

Loading Write Latches ................................................ 44

Protection Against Accidental Writes to OSCCON ........... 140

R

Reader Response............................................................. 216

Reset ........................................................................ 135, 145

BOR, Programmable ................................................ 147

Brown-out Reset (BOR)............................................ 135

Oscillator Start-up Timer (OST) ................................ 135

POR

Operating without FSCM and PWRT................ 147

With Long Crystal Start-up Time ...................... 147

POR (Power-on Reset)............................................. 145

Power-on Reset (POR)............................................. 135

Power-up Timer (PWRT) .......................................... 135

Reset Sequence ................................................................. 57

Reset Sources ............................................................ 57

Reset Sources

Brown-out Reset (BOR).............................................. 57

Illegal Instruction Trap ................................................ 57

Trap Lockout............................................................... 57

Uninitialized W Register Trap ..................................... 57

Watchdog Time-out .................................................... 57

Reset Timing Characteristics............................................ 179

Reset Timing Requirements ............................................. 180

Run-Time Self-Programming (RTSP) ................................. 41

S

Simple Capture Event Mode............................................... 77

Buffer Operation ......................................................... 78

Hall Sensor Mode ....................................................... 78

Prescaler .................................................................... 77

Timer2 and Timer3 Selection Mode............................ 78

Simple OC/PWM Mode Timing Requirements ................. 184

Simple Output Compare Match Mode ................................ 82

Simple PWM Mode ............................................................. 82

Input Pin Fault Protection ........................................... 82

Period ......................................................................... 83

Software Simulator (MPLAB SIM) .................................... 162

Software Stack Pointer, Frame Pointer .............................. 14

CALL Stack Frame ..................................................... 32

SPI Module ......................................................................... 93

Framed SPI Support ................................................... 93

Operating Function Description .................................. 93

Operation During CPU Idle Mode ............................... 95

Operation During CPU Sleep Mode............................ 95

SDOx Disable ............................................................. 93

Slave Select Synchronization ..................................... 95

SPI1 Register Map...................................................... 96

Timing Characteristics

Master Mode (CKE = 0).................................... 189

Master Mode (CKE = 1).................................... 190

Slave Mode (CKE = 1).............................. 191, 192

Timing Requirements

Master Mode (CKE = 0).................................... 189

Master Mode (CKE = 1).................................... 190

Slave Mode (CKE = 0)...................................... 191

Slave Mode (CKE = 1)...................................... 193

Word and Byte Communication .................................. 93

Status Bits, Their Significance and the Initialization

Condition for RCON Register, Case 1 ...................... 148

Status Bits, Their Significance and the Initialization

Condition for RCON Register, Case 2 ...................... 148

Status Register ................................................................... 14

Symbols Used in Opcode Descriptions ............................ 154

System Integration............................................................ 135

Register Map ............................................................ 152

DS70138E-page 212

© 2007 Microchip Technology Inc.

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