DSPIC30F9013AT-30E/P View Datasheet(PDF) - Microchip Technology

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Description

Manufacturer

DSPIC30F9013AT-30E/P

High-Performance, 16-Bit Digital Signal Controllers

Microchip Technology

DSPIC30F9013AT-30E/P Datasheet PDF : 220 Pages

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dsPIC30F3014/4013

6.2 Erasing Data EEPROM

6.2.1

ERASING A BLOCK OF DATA

EEPROM

In order to erase a block of data EEPROM, the

NVMADRU and NVMADR registers must initially point

to the block of memory to be erased. Configure

NVMCON for erasing a block of data EEPROM and

set the WR and WREN bits in the NVMCON register.

Setting the WR bit initiates the erase, as shown in

Example 6-2.

6.2.2

ERASING A WORD OF DATA

EEPROM

The NVMADRU and NVMADR registers must point to

the block. Select a block of data Flash and set the WR

and WREN bits in the NVMCON register. Setting the

WR bit initiates the erase, as shown in Example 6-3.

EXAMPLE 6-2: DATA EEPROM BLOCK ERASE

; Select data EEPROM block, WR, WREN bits

MOV

#4045,W0

MOV

W0,NVMCON

; Initialize NVMCON SFR

; Start erase cycle by setting WR after writing key sequence

DISI #5

; Block all interrupts with priority <7 for

; next 5 instructions

MOV

#0x55,W0

;

MOV

W0,NVMKEY

MOV

#0xAA,W1

; Write the 0x55 key

;

MOV

BSET

W1,NVMKEY

NVMCON,#WR

; Write the 0xAA key

; Initiate erase sequence

NOP

; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle

; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete

EXAMPLE 6-3: DATA EEPROM WORD ERASE

; Select data EEPROM word, WR, WREN bits

MOV

#4044,W0

MOV