FDC37B72X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37B72X

128 Pin Enhanced Super I/O Controller with ACPI Support

SMSC -> Microchip 

has elapsed. If the host issues another command

before the head unloads, then the head settling

time may be saved between subsequent reads.

If the FDC detects a pulse on the nINDEX pin

twice without finding the specified sector (meaning

that the diskette's index hole passes through index

detect logic in the drive twice), the FDC sets the IC

code in Status Register 0 to "01" indicating

abnormal termination, sets the ND bit in Status

Register 1 to "1" indicating a sector not found, and

terminates the Read Data Command.

After reading the ID and Data Fields in each

sector, the FDC checks the CRC bytes. If a CRC

error occurs in the ID or data field, the FDC sets

the IC code in Status Register 0 to "01" indicating

abnormal termination, sets the DE bit flag in Status

Register 1 to "1", sets the DD bit in Status Register

2 to "1" if CRC is incorrect in the ID field, and

terminates the Read Data Command. Table 21

describes the effect of the SK bit on the Read

Data command execution and results. Except

where noted in Table 21, the C or R value of the

sector address is automatically incremented (see

Table 23).

TABLE 24 - EFFECTS OF MT AND N BITS

MAXIMUM TRANSFER FINAL SECTOR READ

MT N

CAPACITY

FROM DISK

0 1 256 x 26 = 6,656

26 at side 0 or 1

1 1 256 x 52 = 13,312

26 at side 1

0 2 512 x 15 = 7,680

15 at side 0 or 1

1 2 512 x 30 = 15,360

15 at side 1

0 3 1024 x 8 = 8,192

8 at side 0 or 1

1 3 1024 x 16 = 16,384

16 at side 1

54

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