FDC37B77X View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
FDC37B77X Datasheet PDF : 196 Pages
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CLOCKI
t1
t2
t2
FIGURE 7A - INPUT CLOCK TIMING
NAME
DESCRIPTION
t1 Clock Cycle Time for 14.318MHZ
t2 Clock High Time/Low Time for 14.318MHz
t1 Clock Cycle Time for 32KHZ
t2 Clock High Time/Low Time for 32KHz
Clock Rise Time/Fall Time (not shown)
MIN TYP
70
35
31.25
16.53
MAX
5
UNITS
ns
ns
µs
µs
ns
FIGURE 7B - RESET TIMING
t4
RESET_DRV
NAME
DESCRIPTION
t4 RESET width (Note 1)
MIN TYP MAX UNITS
1.5
µs
Note 1: The RESET width is dependent upon the processor clock. The RESET must be active while
the clock is running and stable.
172
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