FDC37B77X View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

Manufacturer

FDC37B77X

Enhanced Super I/O Controller with Wake-Up Features and Consumer IR

SMSC -> Microchip 

DESIRED

DIVISOR USED TO

PERCENT ERROR DIFFERENCE

HIGH

BAUD RATE GENERATE 16X CLOCK BETWEEN DESIRED AND ACTUAL1 SPEED BIT2

460800

32769

0.16

1

Note1: The percentage error for all baud rates, except where indicated otherwise, is 0.2%.

Note 2: The High Speed bit is located in the Device Configuration Space.

REGISTER/SIGNAL

Table 32 - Reset Function Table

RESET CONTROL

RESET STATE

Interrupt Enable Register

RESET

All bits low

Interrupt Identification Reg. RESET

Bit 0 is high; Bits 1 - 7 low

FIFO Control

RESET

All bits low

Line Control Reg.

RESET

All bits low

MODEM Control Reg.

RESET

All bits low

Line Status Reg.

RESET

All bits low except 5, 6 high

MODEM Status Reg.

RESET

Bits 0 - 3 low; Bits 4 - 7 input

TXD1, TXD2

RESET

High

INTRPT (RCVR errs)

RESET/Read LSR

Low

INTRPT (RCVR Data Ready) RESET/Read RBR

Low

INTRPT (THRE)

RESET/ReadIIR/Write THR Low

OUT2B

RESET

High

RTSB

RESET

High

DTRB

RESET

High

OUT1B

RESET

High

RCVR FIFO

RESET/

FCR1*FCR0/_FCR0

All Bits Low

XMIT FIFO

RESET/

FCR1*FCR0/_FCR0

All Bits Low

76

Share Link: