DF04M View Datasheet(PDF) - STMicroelectronics

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DF04M

OFFLINE FLYBACK CONVERTERS DESIGN METHODOLOGY WITH THE L6590 FAMILY

STMicroelectronics 

AN1262 APPLICATION NOTE

Flyback transformer design

Eqn. 4 gives the primary inductance (Lp = 1.37 mH, rounded up to 1.4 mH), while eqn. (5) gives the primary-to-

secondary turns ratio (n = 21.4). The design will be done considering Philip's E-cores in 3C85 ferrite and as-

suming a maximum peak flux of 0.25T, a temperature rise of 40 °C and 40% window utilization factor. Going

step-by-step:

1) Eqn. 6 provides a minimum AP of 0.042 cm4. Table 10 shows that an E20/10/6 core could fit the design.

2) The primary turns number will be Npmin = 122.5.

3) The resulting secondary turn number will be 122.5/21.4=5.7 which will rounded up to 6. The primary turns

number will then become 6·21.4=128.4. Finally, the choice will be Np=128 turns and Ns=6 turns, which

yields an actual turns ratio of 128/6 = 21.33, very close to the target.

4) From eqn. 7, the air gap needed to get the desired value of Lp will be 0.63 mm.

5) Table 10 shows that the thermal resistance of the finished core is 46 °C/W, thus the maximum power dissi-

pation inside the transformer shall not exceed 40/46 = 0.87 W.

6) Equations 8, 9 and 10 will provide the actual flux swing (which will be lower than 0.25 T because Np>Npmin),

the actual core losses and the allowed copper losses respectively. The resulting flux swing is ∆B=180 mT:

the relevant core losses amount at 66 mW, thus it is possible to dissipate up to 0.8 W in the windings.

7) The required primary and secondary winding resistance will be 8.65 Ω and 30 mΩ respectively (resulting

from eqns. 11). The resulting primary resistance is quite high and the drop across it reduces significantly the

actual voltage applied at the primary inductance. The target primary resistance is then reduced at 4Ω and

the secondary will be increased at 46mΩ to maintain the same total copper losses.

The required primary and secondary copper area will be 2.87·10-4 cm2 and 1.2·10-3 cm2 respectively (eqns.

12, 13). Table 11 shows that this can be done with one AWG32 wire at the primary and four paralleled (twist-

ed) AWG32 wires at the secondary. This will both minimize high frequency effects and simplify the BOM. The

total occupied area will be 7 mm2 (eqn. 14), 20% of the total available area, thus the windings will fit.

On top of the primary and secondary winding, 14 turns of AWG32 wire will be wound to make the auxiliary

winding (eqn. 15).

8) The actual resistance of the primary and secondary windings will be 3.6 Ω and 42 mΩ respectively, for total

copper losses of 0.73 W. The total losses will be about 0.8 W and the resulting temperature rise 36.8 °C.

Zener clamp

To optimize losses at light load a zener clamp will be used. The clamp voltage should be around 200 V (eqn.

16), thus a BZW06-154 is first selected.

Assuming a leakage inductance of 30 µH (about 2% of the primary inductance), power dissipation will be about

0.6 W in normal operation and about 1.1 W in overcurrent limitation. The relevant clamping voltages would be

196 V and 209 V respectively. The initial choice will then be confirmed.

An STTA106 (1A / 600V turboswitch diode) will be used as the blocking diode.

Secondary rectifier

According to eqn. 17, and considering 25% margin, the blocking voltage of the diode should exceed 28 V, while

its current rating should be in excess of 4 A. Although table 14 suggests a bigger device, an 1N5822 (3A/40V)

Schottky diode is selected for this test board.

36/42

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