LAN91C95 View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
Manufacturer
LAN91C95 Datasheet PDF : 144 Pages
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I/O SPACE - BANK2
OFFSET
6
NAME
POINTER REGISTER
TYPE
READ/WRITE
SYMBOL
PTR
HIGH
BYTE
LOW
BYTE
RCV
0
0
AUTO
INCR.
0
0
READ
0
0
ETEN
0
0
0
POINTER LOW
0
0
POINTER HIGH
0
0
0
0
0
0
POINTER REGISTER - The value of this register
determines the address to be accessed within the
transmit or receive areas. It will auto-increment on
accesses to the data register when AUTO INCR. is
set. The increment is by one for every byte access,
and by two for every word access.
RCV - When RCV is set the address refers to the
receive area and uses the output of RX FIFO as the
packet number, when RCV is clear the address
refers to the transmit area and uses the packet
number at the Packet Number Register.
READ - Determines the type of access to
follow. If the READ bit is high the operation
intended is a read. If the READ bit is low the
operation is a write. Loading a new pointer value,
with the READ bit high, generates a pre-fetch into
the Data Register for read purposes.
Readback of the pointer will indicate the value of
the address last accessed by the CPU (rather than
the last pre-fetched). This allows any interrupt
routine that uses the pointer, to save it and restore
it without affecting the process being interrupted.
The Pointer Register should not be loaded until
400ns after the last write operation to the Data
Register to ensure that the Data Register FIFO is
empty. If the pointer is loaded using 8 bit writes, the
low byte should be loaded first and the high byte
last.
ETEN bit - When set enables EARLY Transmit
underrun detection. Normal operation when clear.
For Underrun detection purposes the RAM logical
address and packet numbers of the packet being
loaded are compared against the logical address
and packet numbers of the packet being
transmitted. If the packet numbers match and the
logical address of the packet being transmitted
exceeds the address being loaded the packet
transmission is aborted and Underrun is reported in
the transmit status word.
NOTE: If AUTO INCR. is not set and 16 bits are
used, the pointer must be loaded with an even
value. If AUTO INCR. is not set and 8 bit (allows
even and odd values) writes are used, consecutive
writes to the data register for the same pointer
(same memory address) value is not allowed; even
and odd pointer values are always allowed.
74
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