Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
Switching Test Conditions
Figure 12 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Table 11.
Figure 12. Output Test Load, LVTTL and LVCMOS Standards
VCCO
R1
DUT
Test
Point
R2
CL
Table 11. Test Fixture Required Components
Test Condition
R1 R2
LVCMOS I/O, (L -> H, H -> L)
106Ω 106Ω
LVCMOS I/O (Z -> H)
∞ 106Ω
LVCMOS I/O (Z -> L)
106Ω ∞
LVCMOS I/O (H -> Z)
∞ 106Ω
LVCMOS I/O (L -> Z)
106Ω ∞
1. CL includes test fixtures and probe capacitance.
CL1
35pF
35pF
35pF
5pF
5pF
0213A/ispm4k
Timing Ref.
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = VCCO/2
LVCMOS 1.8 = VCCO/2
1.5V
1.5V
VOH - 0.3
VOL + 0.3
VCCO
LVCMOS 3.3 = 3.0V
LVCMOS 2.5 = 2.3V
LVCMOS 1.8 = 1.65V
3.0V
3.0V
3.0V
3.0V
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