LFEC1E-3FN672I View Datasheet(PDF) - Lattice Semiconductor

Part Name

Description

Manufacturer

LFEC1E-3FN672I

LatticeECP/EC Family Data Sheet

Lattice Semiconductor 

Lattice Semiconductor

DC and Switching Characteristics

LatticeECP/EC Family Data Sheet

DC Electrical Characteristics

Over Recommended Operating Conditions

Symbol

Parameter

Condition

Min.

Typ.

Max. Units

IIL, IIH1

IIH1, 3

Input or I/O Leakage

Input or I/O High Leakage

0 ≤ VIN ≤ (VCCIO - 0.2V)

(VCCIO - 0.2V) ≤ VIH ≤ 3.6V

—

—

10

µA

—

—

40

µA

IPU

I/O Active Pull-up Current

0 ≤ VIN ≤ 0.7 VCCIO

-30

—

-150

µA

IPD

I/O Active Pull-down Current

VIL (MAX) ≤ VIN ≤ VIH (MAX)

30

—

150

µA

IBHLS Bus Hold Low sustaining current VIN = VIL (MAX)

30

—

—

µA

IBHHS Bus Hold High sustaining current VIN = 0.7VCCIO

-30

—

—

µA

IBHLO Bus Hold Low Overdrive current 0 ≤ VIN ≤ VIH (MAX)

—

—

150

µA

IBHLH Bus Hold High Overdrive current 0 ≤ VIN ≤ VIH (MAX)

—

—

-150

µA

VBHT Bus Hold trip Points

0 ≤ VIN ≤ VIH (MAX)

VIL (MAX)

— VIH (MIN)

V

C1

I/O Capacitance2

VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,

VCC = 1.2V, VIO = 0 to VIH (MAX)

—

8

—

pf

C2

Dedicated Input Capacitance2

VCCIO = 3.3V, 2.5V, 1.8V, 1.5V, 1.2V,

VCC = 1.2V, VIO = 0 to VIH (MAX)

—

6

—

pf

1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tri-stated. It is not measured

with the output driver active. Bus maintenance circuits are disabled.

2. TA 25oC, f = 1.0MHz

3. For top and bottom general purpose I/O pins, when VIH is higher than VCCIO, a transient current typically of 30ns in duration or less with a

peak current of 6mA can occur on the high-to-low transition. For left and right I/O banks, VIH must be less than or equal to VCCIO.

3-2

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