LFECP3E-4TN100C View Datasheet(PDF) - Lattice Semiconductor
Part Name
Description
Manufacturer
LFECP3E-4TN100C Datasheet PDF : 163 Pages
| |||
Lattice Semiconductor
Figure 3-12. sysCONFIG Parallel Port Read Cycle
CCLK 1
CS1N
t SUCS
tBSCL
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
tBSCYC
tBSCH
tHCS
CSN
WRITEN
BUSY
D[0:7]
tSUWD
Byte 0
t CORD
Byte 1
tDCB
t HWD
Byte 2
Byte n
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
Figure 3-13. sysCONFIG Parallel Port Write Cycle
CCLK 1
CS1N
t SUCS
tBSCL
tBSCYC
tBSCH
tHCS
CSN
WRITEN
BUSY
D[0:7]
t SUWD
tSUCBDI
Byte 0
t HCBDI
Byte 1
tDCB
Byte 2
t HWD
Byte n
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
3-26
Share Link: 