LFEC3E-5T144I View Datasheet(PDF) - Lattice Semiconductor

Part Name

Description

Manufacturer

LFEC3E-5T144I

LatticeECP/EC Family Data Sheet

Lattice Semiconductor 

Lattice Semiconductor

DC and Switching Characteristics

LatticeECP/EC Family Data Sheet

Switching Test Conditions

Figure 3-21 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,

voltage, and other test conditions are shown in Table 3-6.

Figure 3-21. Output Test Load, LVTTL and LVCMOS Standards

VT

R1

DUT

Test Point

CL*

*CL Includes Test Fixture and Probe Capacitance

Table 3-6. Test Fixture Required Components, Non-Terminated Interfaces

Test Condition

R1

CL

Timing Ref.

VT

LVCMOS 3.3 = 1.5V

—

LVCMOS 2.5 = VCCIO/2

—

LVTTL and other LVCMOS settings (L -> H, H -> L)

∞

0pF LVCMOS 1.8 = VCCIO/2

—

LVCMOS 1.5 = VCCIO/2

—

LVCMOS 1.2 = VCCIO/2

—

LVCMOS 2.5 I/O (Z -> H)

VCCIO/2

VOL

LVCMOS 2.5 I/O (Z -> L)

LVCMOS 2.5 I/O (H -> Z)

188Ω

0pF VCCIO/2

VOH

VOH - 0.15

VOL

LVCMOS 2.5 I/O (L -> Z)

VOL + 0.15

VOH

Note: Output test conditions for all other interfaces are determined by the respective standards.

3-30

Share Link: