LIS331HH
Register description
Table 38. Interrupt 1 source configurations
AOI
6D
Interrupt mode
0
0
OR combination of interrupt events
0
1
6 direction movement recognition
1
0
AND combination of interrupt events
1
1
6 direction position recognition
7.13
INT1_SRC (31h)
Table 39. INT1_SRC register
0
IA
ZH
ZL
YH
YL
XH
XL
Table 40. INT1_SRC description
Interrupt active. Default value: 0
IA
(0: no interrupt has been generated; 1: one or more interrupts have been generated)
Z high. Default value: 0
ZH
(0: no interrupt, 1: Z High event has occurred)
Z low. Default value: 0
ZL
(0: no interrupt; 1: Z Low event has occurred)
Y high. Default value: 0
YH
(0: no interrupt, 1: Y High event has occurred)
Y low. Default value: 0
YL
(0: no interrupt, 1: Y Low event has occurred)
X high. Default value: 0
XH
(0: no interrupt, 1: X High event has occurred)
X low. Default value: 0
XL
(0: no interrupt, 1: X Low event has occurred)
Interrupt 1 source register. Read only register.
Reading at this address clears INT1_SRC IA bit (and the interrupt signal on INT 1 pin) and
allows the refreshment of data in the INT1_SRC register if the latched option was chosen.
7.14
INT1_THS (32h)
Table 41. INT1_THS register
0
THS6
THS5
THS4
THS3
THS2
THS1
THS0
Doc ID 16366 Rev 1
31/37