LQFP48 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

LQFP48

Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces

STMicroelectronics 

Electrical characteristics

STM32F101x4, STM32F101x6

Table 6. Current characteristics

Symbol

Ratings

Max.

Unit

IVDD

Total current into VDD/VDDA power lines (source)(1)

150

IVSS

Total current out of VSS ground lines (sink)(1)

150

Output current sunk by any I/O and control pin

IIO

Output current source by any I/Os and control pin

25

− 25

mA

IINJ(PIN)(2)

Injected current on five volt tolerant pins(3)

Injected current on any other pin(4)

-5/+0

±5

ΣIINJ(PIN)

Total injected current (sum of all I/O and control pins)(5)

± 25

1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power

supply, in the permitted range.

2. Negative injection disturbs the analog performance of the device. See note in Section 5.3.17: 12-bit ADC

characteristics.

3. Positive injection is not possible on these I/Os. A negative injection is induced by VIN<VSS. IINJ(PIN) must

never be exceeded. Refer to Table 5: Voltage characteristics for the maximum allowed input voltage

values.

4. A positive injection is induced by VIN>VDD while a negative injection is induced by VIN<VSS. IINJ(PIN) must

never be exceeded. Refer to Table 5: Voltage characteristics for the maximum allowed input voltage

values.

5. When several inputs are submitted to a current injection, the maximum ΣIINJ(PIN) is the absolute sum of the

positive and negative injected currents (instantaneous values).

Table 7. Thermal characteristics

Symbol

Ratings

TSTG

TJ

Storage temperature range

Maximum junction temperature

Value

Unit

–65 to +150

°C

150

°C

5.3

5.3.1

Operating conditions

General operating conditions

Table 8. General operating conditions

Symbol

Parameter

Conditions

Min

fHCLK Internal AHB clock frequency

0

fPCLK1 Internal APB1 clock frequency

0

fPCLK2 Internal APB2 clock frequency

0

VDD

Standard operating voltage

2

VDDA(1)

Analog operating voltage

(ADC not used)

Analog operating voltage

(ADC used)

2

Must be the same potential

as VDD(2)

2.4

VBAT Backup operating voltage

1.8

Max

36

36

36

3.6

3.6

3.6

3.6

Unit

MHz

V

V

V

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Doc ID 15058 Rev 5

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