ST92250JDV2QB View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST92250JDV2QB
STMicroelectronics
ST92250JDV2QB Datasheet PDF : 429 Pages
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ST92F124/F150/F250 - ELECTRICAL CHARACTERISTICS
SPI TIMING TABLE
(VDD = 5V ± 10%, TA = –40°C to +125°C, CLoad = 50pF, fINTCLK = 24MHz, unless otherwise specified)
N° Symbol
Parameter
Condition
Value (1)
Min
Max
Unit
fSPI
1
tSPI
2 tLead
3
tLag
4 tSPI_H
5 tSPI_L
6
tSU
7
tH
8
tA
9
tDis
10 tV
11 tHold
12 tRise
13 tFall
SPI frequency
Master
Slave
fINTCLK / 128
0
SPI clock period
Master
Slave
4 x Tck
2 x Tck
Enable lead time
Slave
40
Enable lag time
Slave
40
Clock (SCK) high time
Master
Slave
80
90
Clock (SCK) low time
Master
Slave
80
90
Data set-up time
Master
Slave
40
40
Data hold time (inputs)
Master
Slave
40
40
Access time (time to data active
from high impedance state)
0
Slave
Disable time (hold time to high im-
pedance state)
Data valid
Master (before capture edge) Tck / 4
Slave (after enable edge)
Data hold time (outputs)
Master (before capture edge) Tck / 4
Slave (after enable edge)
0
Rise time
Outputs: SCK,MOSI,MISO
(20% VDD to 70% VDD, CL = 200pF) Inputs: SCK,MOSI,MISO,SS
Fall time
Outputs: SCK,MOSI,MISO
(70% VDD to 20% VDD, CL = 200pF) Inputs: SCK,MOSI,MISO,SS
fINTCLK / 4
fINTCLK / 2
120
240
120
100
100
100
100
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
µs
Note:
Measurement points are VOL, VOH, VIL and VIH in the SPI Timing Diagram.
(1) Values guaranteed by design.
Legend:
Tck = INTCLK period = Crystal Oscillator Clock period when CLOCK1 is not divided by 2;
2 x Crystal Oscillator Clock period when CLOCK1 is divided by 2;
Crystal Oscillator Clock period x PLL factor when the PLL is enabled.
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