ST92150CR2TB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92150CR2TB

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

ST92F124/F150/F250 - KNOWN LIMITATIONS

KNOWN LIMITATIONS (Cont’d)

13.2 FLASH CORRUPTION WHEN EXITING STOP MODE

Description

Workaround

Under very specific conditions, the first read per-

formed in flash memory by the core when exiting

stop mode may be corrupted.

Impact on application

As this first read is an opcode, this corruption may

lead to an unpredictable behavior of the applica-

tion.

Description

In ST92F124/F150/F250 datasheet, there is a

warning in the WUCTRL register description:

“In order to avoid to execute register write instruc-

tions after a correct STOP bit setting sequence

and before entering the STOP mode, it is manda-

tory to execute 3 NOP instructions after the STOP

bit setting sequence.”

The workaround is to replace these 3 NOPs by the

following assembly code:

nop

ldw RRx,0

RRx is an unused register in the register file.

In a C language software, implement the following

code.

Implementation

Declare a dummy variable in the register file (for

example in RR0 16-bit register)

#pragma register_file Dummy_16bit_data 0

volatile unsigned int Dummy_16bit_data;

And replace the actual STOP bit setting sequence

(specified in datasheet):

spp(WU_PG);

WU_CTLR = WUm_wuit | WUm_id1s | WUm_stop;

WU_CTLR = WUm_wuit | WUm_id1s;

WU_CTLR = WUm_wuit | WUm_id1s | WUm_stop;

asm("nop");

asm("nop");

asm("nop");

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