ST92F124DR2QB View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F124DR2QB

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

ST92F124/F150/F250 - INTERRUPTS

ARBITRATION MODES (Cont’d)

Examples

Example 1

In the following two examples, three interrupt re-

quests with different priority levels (2, 3 & 4) occur

simultaneously during the interrupt 5 service rou-

tine.

In the first example, (simplest case, Figure 46) the

ei instruction is not used within the interrupt serv-

ice routines. This means that no new interrupt can

be serviced in the middle of the current one. The

interrupt routines will thus be serviced one after

another, in the order of their priority, until the main

program eventually resumes.

Figure 46. Simple Example of a Sequence of Interrupt Requests with:

- Concurrent mode selected and

- IEN unchanged by the interrupt routines

0

Priority Level of

Interrupt Request

1

INTERRUPT 2 HAS PRIORITY LEVEL 2

INTERRUPT 3 HAS PRIORITY LEVEL 3

INTERRUPT 4 HAS PRIORITY LEVEL 4

INTERRUPT 5 HAS PRIORITY LEVEL 5

2

3

INT 2

4

INT 3

INT 4

5

INT 5

ei CPL = 7

6

INT 5

7

MAIN

CPL is set to 7

INT 2

CPL = 7

INT 3

CPL = 7

INT 4

CPL = 7

MAIN

CPL = 7

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