LT3640IUFD View Datasheet(PDF) - Linear Technology

Part Name

Description

Manufacturer

LT3640IUFD

Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer

Linear Technology 

LT3640

Timing Diagrams

FB

RST

Power-On Reset Timing

tUV

tRST

Watchdog Timing

WDI

WDO

t < tWDL tRST

t < tWDU

tDLY

tWDU

tWDL < t < tWDU

tRST

3640 TD

Operation

The LT3640 is a dual channel, constant-frequency, current

mode monolithic buck switching regulator with power-on

reset and watchdog timer. Both channels are synchronized

to a single oscillator with frequency set by RT. Operation can

be best understood by referring to the Block Diagram.

Buck Regulators

The high voltage channel is a nonsynchronous buck

regulator that operates from the VIN pin. The start of each

oscillator cycle sets an SR latch and turns on the internal

NPN power switch. An amplifier and comparator monitor

the current flowing between the VIN and SW1 pins, turning

the switch off when this current reaches a level determined

by the voltage at VC1 node. An error amplifier measures

the output voltage through an external resistor divider tied

to the FB1 pin and servos the VC1 node. The reference

of the error amplifier is determined by the lower of the

internal reference and the voltage at the SS1 pin. If the error

amplifier’s output increases, more current is delivered to

the output; if it decreases, less current is delivered.

10

An active clamp (not shown) on the VC1 node provides

peak current limit. A DA pin current comparator extends

the oscillator cycle until the catch diode current is below

the valley current limit. Both the peak and valley current

limits help to control the inductor current in fault condi-

tions such as shorted output with high VIN. Both current

limits are reduced when the voltage at the FB1 pin is below

0.2V. This current foldback helps to control the inductor

current during start-up and overload.

The NPN power switch driver operates from either the VIN

pin or the BST pin. An external capacitor and diode are

used to generate a voltage between the BST and SW pins.

During the power-up of the LT3640, an internal 5mA current

source charges the external BST capacitor. The regulator

starts switching when the (BST-SW) voltage reaches the

2V threshold. The internal NPN power switch can be fully

saturated for efficient operation when the (BST-SW) volt-

age is between 2.3V and 5.5V.

The low voltage channel is a synchronous buck regulator

that operates from the VIN2 pin. It starts switching only

3640f

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