LTC1594CS-TR View Datasheet(PDF) - Linear Technology
Part Name
Description
Manufacturer
LTC1594CS-TR Datasheet PDF : 24 Pages
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LTC1594/LTC1598
TYPICAL APPLICATIONS N
Using MUXOUT/ADCIN Loop as PGA
This figure shows the LTC1598’s MUXOUT/ADCIN loop
and an LT1368 being used to create a single channel PGA
with eight noninverting gains. Combined with the LTC1391,
the system can expand to eight channels and eight gains
for each channel. Using the LTC1594, the PGA is reduced
to four gains. The output of the LT1368 drives the ADCIN
and the resistor ladder. The resistors above the selected
MUX channel form the feedback for the LT1368. The loop
gain for this amplifier is RS1/RS2 + 1. RS1 is the summation
of the resistors above the selected MUX channel and RS2
is the summation of the resistors below the selected MUX
channel. If CH0 is selected, the loop gain is 1 since RS1 is
0. Table 1 shows the gain for each MUX channel. The
LT1368 dual rail-to-rail op amp is designed to operate with
0.1μF load capacitors. These capacitors provide frequency
compensation for the amplifiers, help reduce the amplifi-
ers’ output impedance and improve supply rejection at
high frequencies. Because the LT1368’s IB is low, the RON
of the selected channel will not affect the loop gain given
by the formula above.
Using the MUXOUT/ADCIN Loop of the LTC1598 to Form a PGA with Eight Gains in a Noninverting Configuration
5V
LTC1391
1 CH0
2 CH1
3 CH2
4 CH3
5
CH4
6 CH5
7 CH6
8 CH7
V+ 16
D 15
V– 14
DOUT
DIN
13
12
11
CS
CLK 10
GND 9
1mF 5V
1mF
+
1/2 LT1368
–
0.1mF
64R
20 CH0
32R
21 CH1
16R
22 CH2
8R
23 CH3 8-CHANNEL
4R
24 CH4
MUX
2R
1 CH5
R
2 CH6
R
3 CH7
18 MUXOUT
8 COM
5V
17
16
15, 19
1mF
ADCIN
VREF VCC
12-BIT
+ SAMPLING
ADC
–
CSADC
CSMUX
CLK
DOUT
DIN
10
6
5, 14
11
7
LTC1598
GND
4, 9
12
NC
13
NC
mP/mC
1594/98 TA06
15948fb
22
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