LTC4359HMS8-TRPBF View Datasheet(PDF) - Linear Technology
Part Name
Description
Manufacturer
LTC4359HMS8-TRPBF Datasheet PDF : 16 Pages
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LTC4359
Electrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, IN = 12V, SOURCE = IN, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VIN
Operating Supply Range
l
4
80
V
IIN
IN Current
IN = 12V
IN = OUT =12V, SHDN = 0V
IN = OUT =24V, SHDN = 0V
IN = −40V
l
150
200
µA
l
9
20
µA
l
15
30
µA
l
0
–15
–40
µA
IOUT
OUT Current
IN = 12V, In Regulation
IN = 12V, ∆VSD = −1V
IN = OUT =12V, SHDN = 0V
IN = OUT =24V, SHDN = 0V
OUT = 12V, IN = SHDN = 0V
l
3
5
7.5
µA
l
120
200
µA
l
0.8
3
µA
l
0.8
3
µA
l
6
12
µA
ISOURCE SOURCE Current
IN = 12V, ∆VSD = −1V
IN = SOURCE = 12V, SHDN = 0V
SOURCE = –40V
l
150
200
µA
l
1
4
15
µA
l –0.4 –0.8 –1.5
mA
∆VGATE
∆VSD
Gate Drive (GATE–SOURCE)
Source-Drain Regulation Voltage (IN –OUT)
IN = 4V, IGATE = 0, −1µA
IN = 8V to 80V; IGATE = 0, –1µA
∆VGATE = 2.5V
l 4.5
5.5
15
V
l 10
12
15
V
l 20
30
45
mV
IGATE(UP) Gate Pull-Up Current
GATE = IN, ∆VSD = 0.1V
l –6
–10
–14
µA
IGATE(DOWN) Gate Pull-Down Current
tOFF
Gate Turn-Off Delay Time
VSHDN(TH) SHDN Pin Input Threshold
Fault Condition, ∆VGATE =5V, ∆VSD = −1V
l 70
130
180
mA
Shutdown Mode, ∆VGATE = 5V, ∆VSD = 0.7V l 0.6
mA
∆VSD = 0.1V to −1V, ∆VGATE < 2V,
l
CGATE = 0pF
0.3
0.5
µs
IN = 4V to 80V
l 0.6
1.2
2
V
VSHDN(FLT) SHDN Pin Float Voltage
ISHDN
SHDN Pin Current
VSOURCE(TH) Reverse SOURCE Threshold for GATE off
IN = 4V to 80V
SHDN = 0.5V, LTC4359I, LTC4359C
SHDN = 0.5V, LTC4359H
SHDN = −40V
Maximum Allowable Leakage, VIN = 4V
GATE = 0V, IGATE(DOWN) = 1mA
l 0.6
1.75
2.5
V
l –1
–2.6
–5
µA
l –0.5 –2.6
–5
µA
l –0.4 –0.8 –1.5
mA
100
nA
l –0.9 –1.8 –2.7
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into pins are positive, all voltages are referenced to
VSS unless otherwise specified.
Note 3. An internal clamp limits the OUT pin to a minimum of 100V above
VSS. Driving this pin with more current than 1mA may damage the device.
Note 4. An internal clamp limits the GATE pin to a minimum of 10V above
IN or 100V above VSS. Driving this pin to voltages beyond the clamp may
damage the device.
4359f
3
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