M25P05-AVZW6TP View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
Manufacturer
M25P05-AVZW6TP Datasheet PDF : 52 Pages
| |||
DC and AC parameters
M25P05-A
Table 17.
AC characteristics (50 MHz operation)
50 MHz available only in products with process technology code Y(1)(2)
Test conditions specified in Table 10 and Table 11.
Symbol Alt.
Parameter
Min Typ Max Unit
fC
fC
Clock frequency(1) for the following instructions: FAST_READ,
PP, SE, BE, DP, RES, WREN, WRDI, RDID, RDSR, WRSR
D.C.
50 MHz
fR
Clock frequency for read instructions
D.C.
tCH(3)
tCLH Clock high time
9
tCL(3)
tCLL Clock low time
9
tCLCH(4)
Clock rise time(5) (peak to peak)
0.1
tCHCL(4)
Clock fall time(5) (peak to peak)
0.1
tSLCH tCSS S active setup time (relative to C)
5
tCHSL
S not active hold time (relative to C)
5
tDVCH tDSU Data in setup time
2
tCHDX
tDH Data in hold time
5
tCHSH
S active hold time (relative to C)
5
tSHCH
S not active setup time (relative to C)
5
tSHSL tCSH S deselect time
100
tSHQZ(4) tDIS Output disable time
tCLQV
tV Clock Low to Output Valid
tCLQX
tHO Output hold time
0
tHLCH
HOLD setup time (relative to C)
5
tCHHH
HOLD hold time (relative to C)
5
tHHCH
HOLD setup time (relative to C)
5
tCHHL
HOLD hold time (relative to C)
5
tHHQX(4) tLZ HOLD to Output Low-Z
tHLQZ(4) tHZ HOLD to Output High-Z
tWHSL(6)
Write protect setup time
20
tSHWL(6)
Write protect hold time
100
tDP(4)
S High to deep power-down mode
tRES1(4)
S High to standby mode without electronic signature read
tRES2(4)
S High to standby mode with electronic signature read
25 MHz
ns
ns
V/ns
V/ns
ns
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
3
µs
30 µs
30 µs
1. Details of how to find the process on the device marking are given in application note AN1995.
2. 50 MHz operation is also available in products with process technology code X, but with a reduced supply voltage range
(2.7 to 3.6 V).
3. tCH + tCL must be greater than or equal to 1/ fC.
4. Value guaranteed by characterization, not 100% tested in production.
5. Expressed as a slew-rate.
6. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’.
42/52
Share Link: 