Clock operations
M41T94
4.13
Initial power-on defaults
Upon initial application of power to the device, the following register bits are set to a '0' state:
Watchdog register, TR, FT, AFE, ABE, and SQWE. The following bits are set to a '1' state:
ST, OUT, and HT (see Table 9: Default values).
Table 8. tREC definitions
tREC bit (TR)
STOP bit (ST)
0
0
0
1
1
X
1. Default setting
Table 9. Default values
Condition
TR ST HT
Initial power-up
(battery attach for
SNAPHAT)(2)
0
1
1
Subsequent power-up
(with battery back-up)(3)
UC
UC
1
1. BMB0-BMB4, RB0, RB1.
2. State of other control bits undefined.
3. UC = Unchanged
tREC time
Min
Max
96
98
40
200(1)
50
2000
Units
ms
ms
µs
Out
FT
AFE
ABE
SQWE
WATCHDOG
register(1)
1
0
0
0
0
0
UC 0
0
0
0
0
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