APPLICATION
2.2 Timer
Interrupt control register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt control register 1 (ICON1) [Address : 3E16]
B
Name
0 INT0 interrupt enable bit
1 INT1 interrupt enable bit
Function
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
2 Serial I/O receive interrupt
enable bit
3 Serial I/O transmit interrupt
enable bit
4 Timer X interrupt enable bit
5 Timer Y interrupt enable bit
6 Timer 1 interrupt enable bit
7 Timer 2 interrupt enable bit
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
Fig. 2.2.8 Structure of Interrupt control register 1
At reset R W
0
0
0
0
0
0
0
0
Interrupt control register 2
b7 b6 b5 b4 b3 b2 b1 b0
00
Interrupt control reigster 2 (ICON2) [Address : 3F16]
B
Name
Function
0 CNTR0 interrupt enable bit
1 CNTR1 interrupt enable bit
2 INT2 interrupt enable bit
3 INT3 interrupt enable bit
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
4 INT4 interrupt enable bit
0 : Interrupt disabled
1 : Interrupt enabled
5 INT5 interrupt enable bit
6 Fix these bits to “0.”
7
0 : Interrupt disabled
1 : Interrupt enabled
At reset R W
0
0
0
0
0
0
0
0
Fig. 2.2.9 Structure of Interrupt control register 2
2-10
3800 GROUP USER’S MANUAL