M41ST85 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M41ST85

3.0/3.3V I²C combination serial RTC, NVRAM supervisor and microprocessor supervisor

STMicroelectronics 

Clock operation

M41ST85W

3.13

trec bit

Bit D7 of Clock Register 04h contains the trec Bit (TR). trec refers to the automatic

continuation of the deselect time after VCC reaches VPFD. This allows for a voltage settling

time before WRITEs may again be performed to the device after a power-down condition.

The trec Bit will allow the user to set the length of this deselect time as defined by Table 6.

3.14

Initial power-on defaults

Upon initial application of power to the device, the following register bits are set to a '0' state:

Watchdog Register, FT, AFE, ABE, SQWE, and TR. The following bits are set to a '1' state:

ST, OUT, and HT (see Table 7).

Table 6. trec definitions

trec bit (TR)

STOP bit (ST)

0

0

0

1

1

X

1. Default Setting

trec time

Min

Max

96

98

40

200(1)

50

2000

Units

ms

ms

µs

Table 7. Default values

Condition

Initial Power-up(2)

TR

ST

HT Out FT AFE ABE SQWE

Watchdog

register(1)

0111000

0

0

Subsequent Power-up

(with battery back-up)(3)

UC UC

1

UC

0

0

0

0

0

1. WDS, BMB0-BMB4, RB0, RB1.

2. State of other control bits undefined.

3. UC = Unchanged

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